Hi Simon,
On Thu, May 9, 2019 at 11:57 AM Simon Horman <[email protected]> wrote:
> On Wed, May 08, 2019 at 03:20:03PM +0200, Geert Uytterhoeven wrote:
> > On Wed, May 8, 2019 at 1:56 PM Simon Horman <[email protected]>
> > wrote:
> > > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > > @@ -155,6 +155,7 @@
> > > power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
> > > next-level-cache = <&L2_CA57>;
> > > enable-method = "psci";
> > > + dynamic-power-coefficient = <854>;
> >
> > The dynamic-power-coefficient property is a property of the CPU,
> > documented in Documentation/devicetree/bindings/arm/cpus.yaml,
> > and not directly related to thermal zones.
> >
> > Hence I think its addition should be done in a separate patch.
>
> Sure, can do. Should the coefficient be added to each CPU or only
> to a57_0 and a53_0, as is the case in this patch?
>
> I assume the latter because the A53 coefficient applies to all A53 cores
> and likewise for A57.
The latter, I think.
> > > clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
> > > operating-points-v2 = <&cluster0_opp>;
> > > capacity-dmips-mhz = <1024>;
> > > @@ -207,6 +208,8 @@
> > > power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
> > > next-level-cache = <&L2_CA53>;
> > > enable-method = "psci";
> > > + #cooling-cells = <2>;
> > > + dynamic-power-coefficient = <277>;
> >
> > Likewise.
> >
> > > clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
> > > operating-points-v2 = <&cluster1_opp>;
> > > capacity-dmips-mhz = <535>;
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
