Describe the dynamic power coefficient of A53 CPUs. Based on work by Gaku Inami <[email protected]> and others.
Signed-off-by: Biju Das <[email protected]> --- arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index 764df4c..c7bdc36 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -77,6 +77,7 @@ power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + dynamic-power-coefficient = <277>; clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; }; -- 2.7.4
