On Fri, Sep 13, 2019 at 09:50:07AM +0100, Biju Das wrote: > Setup a thermal zone driven by SoC temperature sensor. > Create passive trip points and bind them to CPUFreq cooling > device that supports power extension. > > Based on the work done by Dien Pham <[email protected]> > and others for r8a77990 SoC. > > Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Simon Horman <[email protected]> > --- > arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 19 ++++++++++++++++--- > 1 file changed, 16 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > index a1c2de9..764df4c 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > @@ -73,6 +73,7 @@ > compatible = "arm,cortex-a53"; > reg = <0>; > device_type = "cpu"; > + #cooling-cells = <2>; > power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; > next-level-cache = <&L2_CA53>; > enable-method = "psci"; > @@ -1905,18 +1906,30 @@ > thermal-zones { > cpu-thermal { > polling-delay-passive = <250>; > - polling-delay = <1000>; > - thermal-sensors = <&thermal>; > + polling-delay = <0>; > + thermal-sensors = <&thermal 0>; > + sustainable-power = <717>; > > cooling-maps { > + map0 { > + trip = <&target>; > + cooling-device = <&a53_0 0 2>; > + contribution = <1024>; > + }; > }; > > trips { > - cpu-crit { > + sensor1_crit: sensor1-crit { > temperature = <120000>; > hysteresis = <2000>; > type = "critical"; > }; > + > + target: trip-point1 { > + temperature = <100000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > }; > }; > }; > -- > 2.7.4 >
