Dave Jones wrote:
>
> Rafael E. Herrera <[EMAIL PROTECTED]> wrote:
> > I read an article in
> > http://news.tucows.com/ext2/99/11/articles/ext2112919991.shtml (which
> > someone told me is not very good)
>
> I was asked to write an article on SMP programming. Considering I didn't
> have an SMP board to experiment on, and used only existing code/documentation
> it seems to have gone down well with everyone else who has read it.
>
> > that I understand to mean that there
> > is the possibility that more than 'Size' bytes will be writen/read
>
> I think you misinterpreted what I wrote in the article.
> The section I think you got confused on was the bit where I was explaining
> how a device could recieve two sets of bytes at the same time if both
> CPUs were in that routine. The spinlock example you went on to show seems
> okay to me, so it seems you got the message I was trying to put across.
This is the segment I don't quite get (quoted from the link above):
1: void init_hardware(void)
2: {
3: outb (0x1, hardware_base + 0x30);
4: outb (0x2, hardware_base + 0x30);
5: outb (0x3, hardware_base + 0x30);
6: outb (0x4, hardware_base + 0x30);
7: }
fig.1 ( Imaginary init routine)
That is what I am still not very clear about. What is it meant when
"another CPU enters". Is it that while that code segment of outb()'s is
being executed, the same segment can be called from some other place? Or
does it mean that line 3 gets executed by CPU0, line 3 by CPU1, line 4
by CPU0, line 4 by CPU1, etc. All withing the same call to that
function?
Thanks,
Rafael
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