On Fri, 21 Jan 2000, Rafael E. Herrera wrote:
> This is the segment I don't quite get (quoted from the link above):
>
> 1: void init_hardware(void)
> 2: {
> 3: outb (0x1, hardware_base + 0x30);
> 4: outb (0x2, hardware_base + 0x30);
> 5: outb (0x3, hardware_base + 0x30);
> 6: outb (0x4, hardware_base + 0x30);
> 7: }
> fig.1 ( Imaginary init routine)
>
> That is what I am still not very clear about. What is it meant when
> "another CPU enters".
Imagine for example something occurs which needs the device
to reinitialise itself, if this occurs twice in quick succession,
there could be a call to init_hardware() on each CPU. What the
hardware then receives is a mangled init sequence.
> Is it that while that code segment of outb()'s is
> being executed, the same segment can be called from some other place?
Yes. Two (or more) simulateneous calls to init_hardware() would
do the trick.
> Or does it mean that line 3 gets executed by CPU0, line 3 by CPU1,
> line 4 by CPU0, line 4 by CPU1, etc. All withing the same call to
> that function?
No.
Hope that clears things up.
(If I've got any of this wrong, someone please point me
the right way. As I don't have an SMP box, most of this
was guesswork)
--
Dave.
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