Extend m25p80_read allowing to read in chunks in case the
SPI HW has a max supported message size.

Signed-off-by: Heiner Kallweit <[email protected]>
---
 drivers/mtd/devices/m25p80.c | 39 ++++++++++++++++++++++++++++++++++-----
 1 file changed, 34 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index c9c3b7f..df4c510 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -115,11 +115,7 @@ static inline unsigned int m25p80_rx_nbits(struct spi_nor 
*nor)
        }
 }
 
-/*
- * Read an address range from the nor chip.  The address range
- * may be any size provided it is within the physical boundaries.
- */
-static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
+static int _m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
                        size_t *retlen, u_char *buf)
 {
        struct m25p *flash = nor->priv;
@@ -153,6 +149,39 @@ static int m25p80_read(struct spi_nor *nor, loff_t from, 
size_t len,
 }
 
 /*
+ * Read an address range from the nor chip.  The address range
+ * may be any size provided it is within the physical boundaries.
+ */
+static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
+                       size_t *retlen, u_char *buf)
+{
+       struct m25p *flash = nor->priv;
+       size_t cmd_len, xfer_len, max_len;
+       int ret = 0;
+
+       /* convert the dummy cycles to the number of bytes */
+       cmd_len = m25p_cmdsz(nor) + nor->read_dummy / 8;
+
+       max_len = flash->spi->master->max_msg_size ?: SIZE_MAX;
+
+       if (unlikely(max_len < cmd_len))
+               return -EINVAL;
+
+       max_len -= cmd_len;
+
+       while (len) {
+               xfer_len = min(len, max_len);
+               ret = _m25p80_read(nor, from, xfer_len, retlen, buf);
+               if (ret < 0)
+                       break;
+               from += xfer_len;
+               len -= xfer_len;
+       }
+
+       return ret;
+}
+
+/*
  * board specific setup should have ensured the SPI clock used here
  * matches what the READ command supports, at least until this driver
  * understands FAST_READ (for clocks over 25 MHz).
-- 
2.6.2


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