On Sun, Nov 22, 2015 at 12:01:40AM +0100, Heiner Kallweit wrote: > Add a member to spi_master allowing to better handle > SPI chips with a message size HW limit.
How many devices have an actual message size limit (as opposed to a transfer size limit)? It seems like the restrictions here are really on transfer sizes and that we probably want a second limit for devices that aren't able to deal with multiple transfers independently. For slightly more complex things like this it probably also makes sense to use an accessor - I can see us wanting to combine restrictions from DMA engines into restrictions for the SPI controller for example. That gives us a bit of insulation between the clients and the API.
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