On Sun, Jan 05, 2014 at 03:39:04PM +0000, Carlo Caione wrote:
> Allwinner A20 SoCs have special registers to control / (un)mask /
> acknowledge NMI. This NMI controller is separated and independent from GIC.
> This patch adds a new irqchip to manage NMI.
> 
> Signed-off-by: Carlo Caione <carlo.cai...@gmail.com>
> ---
>  drivers/irqchip/Makefile        |   1 +
>  drivers/irqchip/irq-sun7i-nmi.c | 191 
> ++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 192 insertions(+)
>  create mode 100644 drivers/irqchip/irq-sun7i-nmi.c

[...]

> +IRQCHIP_DECLARE(sun7i_sc_nmi, "allwinner,sun7i-sc-nmi", 
> sun7i_sc_nmi_irq_init);

Binding document please.

Thanks,
Mark.

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