On Thu, Mar 06, 2014 at 12:27:13AM +0800, Chen-Yu Tsai wrote: > The A31 has the same GMAC found on the A20 SoC, except it has > an extra reset control. > > Signed-off-by: Chen-Yu Tsai <[email protected]> > --- > arch/arm/boot/dts/sun6i-a31.dtsi | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi > b/arch/arm/boot/dts/sun6i-a31.dtsi > index ee09e4c..e958d5f 100644 > --- a/arch/arm/boot/dts/sun6i-a31.dtsi > +++ b/arch/arm/boot/dts/sun6i-a31.dtsi > @@ -429,6 +429,22 @@ > status = "disabled"; > }; > > + gmac: ethernet@01c30000 { > + compatible = "allwinner,sun7i-a20-gmac"; > + reg = <0x01c30000 0x1054>; > + interrupts = <0 82 4>; > + interrupt-names = "macirq"; > + clocks = <&ahb1_gates 17>, <&gmac_tx_clk>; > + clock-names = "stmmaceth", "allwinner_gmac_tx"; > + resets = <&ahb1_rst 17>;
You need an additional
reset-names = "stmmaceth";
Thanks!
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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