On Monday, March 17, 2014 08:28:26 PM mrnuke wrote: I re-ran some captures after a clean reset.
> However, on higher speeds, the > bursts seem to happen in 64-byte micro-bursts. My assumption is that > we aren't servicing the 3/4 FIFO interrupts fast enough, the FIFOs get > filled, and the controller pauses communication. Up to 10MHz SCLK, bursts are continuous with this patch. > At higher speeds, > there seem to be weird effects, such as the transmission pausing mid- > byte for a long period of time, but I suspect this to be due to my > logic analyzer being too slow and/or too much impedance in the > connecting wires (logic analyzer missing SCLK transitions). > My logic analyzer cannot reliably capture higher clocks, so any results at speeds higher than 10MHz are completely bogus. Alex -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
