Hi Siahrhei,
Thank you for your suggestion. I believe I am turning on the cache by
calling:
void cpu_dcache_enable(void) {
u32 reg ;
reg = get_cr();
timer_delay_ms(1) ;
set_cr(reg | CR_C);
}
void cpu_icache_enable(void) {
u32 reg ;
reg = get_cr();
timer_delay_ms(1) ;
set_cr(reg | CR_I);
}
which I believe turn on/off C (CP15) bits.
I installed Antutu on that hardware (melee a1000g) and managed to
over-clock it to 1200Mhz and could make sure it was a real over clocking -
meaning that the system indeed became faster.
I guess PLL1 is not the only guy that should be dealt with - perhaps
someone knows what else?
I'll keep looking into this.
Thanks again!
On Thursday, August 28, 2014 10:13:45 AM UTC+3, Siarhei Siamashka wrote:
>
> On Mon, 25 Aug 2014 05:43:04 -0700 (PDT)
> RFat <[email protected] <javascript:>> wrote:
>
> > Hi all,
> >
> > I am trying to overclock the A31 higher than 1008MHz
>
> Are you fine with the deterioration of reliability and/or overheating
> under high load?
>
> > and I am getting deterioration in performance.
> >
> > The way I work is execute a small program from u-boot which redefines
> the N
> > multiplayer of PLL1 and then runs some CPU-intentive routine (to measure
> > performance).
> >
> > Here are the results I get (the N multiplier is given in the small
> brackets
> > starting from 18):
> >
> > CPU Freq = 864Mhz (18)
> > run in 10Hz, 94ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:18 Sigma:0 Lock:0 Freq:432Mhz
> coreclk:864Mhz
> > CPU Freq = 912Mhz (19)
> > run in 11Hz, 89ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:19 Sigma:0 Lock:0 Freq:456Mhz
> coreclk:912Mhz
> > CPU Freq = 960Mhz (20)
> > run in 11Hz, 85ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:20 Sigma:0 Lock:0 Freq:480Mhz
> coreclk:960Mhz
> > CPU Freq = 1008Mhz (21)
> > run in 12Hz, 81ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:21 Sigma:0 Lock:0 Freq:504Mhz
> coreclk:1008Mhz
> > CPU Freq = 1056Mhz (22)
> > run in 12Hz, 77ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:22 Sigma:0 Lock:0 Freq:528Mhz
> coreclk:1056Mhz
> > CPU Freq = 1104Mhz (23)
> > run in 9Hz, 101ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:23 Sigma:0 Lock:0 Freq:552Mhz
> coreclk:1104Mhz
> > CPU Freq = 1152Mhz (24)
> > run in 9Hz, 101ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:24 Sigma:0 Lock:0 Freq:576Mhz
> coreclk:1152Mhz
> > CPU Freq = 1200Mhz (25)
> > run in 9Hz, 101ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:25 Sigma:0 Lock:0 Freq:600Mhz
> coreclk:1200Mhz
> > CPU Freq = 1248Mhz (26)
> > run in 9Hz, 101ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:26 Sigma:0 Lock:0 Freq:624Mhz
> coreclk:1248Mhz
> > CPU Freq = 1296Mhz (27)
> > run in 9Hz, 101ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:27 Sigma:0 Lock:0 Freq:648Mhz
> coreclk:1296Mhz
> > CPU Freq = 1344Mhz (28)
> > run in 9Hz, 101ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:28 Sigma:0 Lock:0 Freq:672Mhz
> coreclk:1344Mhz
> > CPU Freq = 1392Mhz (29)
> > run in 9Hz, 101ms
> > PLL1 is ENABLED P:2 M:1 K:3 N:29 Sigma:0 Lock:0 Freq:696Mhz
> coreclk:1392Mhz
> >
> > As you can see, after 1008 (or 1056) there's a _decrease_ in
> performance.
>
> I can see that the performance flattens out and remains at the same
> 101ms level for your CPU-intensive routine.
>
> If you are running the code in u-boot from SRAM and the L1 cache is not
> enabled, then the instructions fetch may become a bottleneck.
>
> > Does anyone knows how higher performance can be achieved?
>
> Maybe buy a different higher performance SoC or better optimize the
> software?
>
> --
> Best regards,
> Siarhei Siamashka
>
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