Hi

For A13-OLinuxino till now we conservatively used the Linux-Sunxi uboot, 
but we recently got new lot of Samsung memories and we decided to tweak 
some parameters for this DDR in Linux-Sunxi uboot and found problems. 
As this uboot is with status not maintained anymore I will not discuss the 
problems, as probably no one will spend time on it, so we wisely decided to 
move to mainline uboot :) but it seems there are other issues to address.

The PLL5 and PLL6 values are changed and this cause problems, this is what 
we found so far:


1. mainline u-boot  
=================
1.1 pll5
address 0x01c20020, value 0xb1049091 - P=1, N=16, K=2, M=2. 
 The PLL5 output for DDR = (24MHz*N*K)/M. DDR=24*16*2/2 = 384MHz 
The PLL5 output for other module = (24MHz*N*K)/P. DDR=24*16*2/1 = 768MHz  - 
This high frequency cause LCDs connected to the board to flicker
1.2 pll6
address 0x01c20028, value 0xA1009900 - N=25, K=1, M=1
 The PLL6 output is (24MHz*N*K)/M/2 = 24*25*1/1/2 = 300MHz
1.3 MBUS clock
address 0x01c2015c, value 0x81000001  - MBUS clock source is PLL6/2 = 300/2 
= 150MHz - This is connected to PLL6 setup, at this 150 Mhz the board cant 
play video smoothly and sometimes drop video packets when the video is 
playing
 2. sunxi u-boot  
=================
1.1 pll5
address 0x01c20020, value 0xb1049091 - P=2, N=17, K=2, M=2. 
 The PLL5 output for DDR = (24MHz*N*K)/M. DDR=24*17*2/2 = 408MHz
The PLL5 output for other module = (24MHz*N*K)/P. DDR=24*16*2/2 = 408MHz  - 
this frequency was OK, There is no problem with LCD flickering, why the 
frequency increase was necessary?
1.2 pll6
address 0x01c20028, value 0xA1009900 - N=25, K=1, M=1
 The PLL6 output is (24MHz*N*K)/M/2 = 24*25*1/1/2 = 300MHz
1.3 about MBUS clock
address 0x01c2015c, value 0x82000001  - MBUS clock source is PLL5/2 = 408/2 
= 204MHz - at this frequency No packet drop when the video is playing 


Can you tell me the reasons for the PLL5 and PLL6 frequency changes to 
mainline uboot?

Best regards
Tsvetan

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