Hi > Something based on their function? > > 0x0150 HDMI_CLK_REG > normal clock gating + PLL selector + divisor. Looks like a normal clock > output for HDMI block? This is the actual clock control within the HDMI module. yes.
> 0x0174 HDMI1_CTRL_REG
> no idea what the function this has. Is it even a clock? All the
> documentation I have access to only says "HDMI1 System Control
> Register".
That's an additional part of the controller.
They just tinkered the IP blocks control bus into the SoC-design tool wherever
there was space within the address range.
That just happens when 50 people just change a whole IP block in the middle of
the design stage ^^'
Cheers
David
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