Hi,
On 30-07-15 09:29, Boris Brezillon wrote:
Hi,
On Wed, 29 Jul 2015 19:53:52 +0200
Hans de Goede <[email protected]> wrote:
On some nand controllers with hw-ecc the controller code wants to know the
ecc strength and size and having these as 0, 0 is not accepted.
Specifying these in devicetree is possible but undesirable as the nand
may be different in different production runs of the same board, so it
is better to get this info from the nand id where possible.
This commit adds code to read the ecc strength and size from the nand for
Samsung extended-id nands. This code is based on the info for the 5th
id byte in the datasheets for the following Samsung nands: K9GAG08U0E,
K9GAG08U0F, K9GAG08X0D, K9GBG08U0A, K9GBG08U0B. These all use these bits
in the exact same way.
Okay, that's the one I'm not sure about. If that's really the case,
and Samsung is actually using the same layout for all its chips, we
should be good, but as I already stated in the other thread, this was
not the case for Hynix chips.
The list of datasheets I checked is longer then the one used to write
the other samsung code which is setting equally important properties.
Regards,
Hans
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