Hi, On Thu, Jan 21, 2016 at 01:26:36PM +0800, Chen-Yu Tsai wrote: > According to Allwinner, only mmc3 supports 8 bit DDR transfers for eMMC. > Switch to mmc3 for the onboard eMMC, and also assign vqmmc for signal > voltage sensing/switching, and "cap-mmc-hw-reset" to denote this > instance can use eMMC hardware reset. > > Signed-off-by: Chen-Yu Tsai <[email protected]> > --- > arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi > b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi > index ea69fb8ad4d8..4ec0c8679b2e 100644 > --- a/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi > +++ b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi > @@ -61,12 +61,14 @@ > }; > > /* eMMC on core board */ > -&mmc2 { > +&mmc3 { > pinctrl-names = "default"; > - pinctrl-0 = <&mmc2_8bit_emmc_pins>; > + pinctrl-0 = <&mmc3_8bit_emmc_pins>; > vmmc-supply = <®_dcdc1>; > + vqmmc-supply = <®_dcdc1>;
That seems odd. IIRC the VCC was supposed to be fixed and VCCQ could be either at 1.8 or 3V. Having the same regulator on both would make VCCQ forced to 3.3V, which seems to go against your commit log. What's the catch ? :) Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
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