Hi,
On 10-08-16 13:51, LABBE Corentin wrote:
On Wed, Aug 10, 2016 at 11:54:37AM +0200, Hans de Goede wrote:
Hi Labbe,
Since your ethernet driver is more or less ready for merging,
I was wondering what the status of external phy support is ?
I've a bunch of H3 boards (all orangepi-s) which use an external
phy, if I take your v2 driver then what is needed on top to
get the ethernet to work on these ?
Thanks & Regards,
Hans
Hello
Nothing is needed at driver level, both external and internal PHY are supported.
But perhaps the PHY need a regulator which is handled with a separate patch.
See my V3 branch and example with opi+ at
https://github.com/montjoie/linux/commits/sun8i-emac-wip-v3
Great I've just tested this on a Plus 2 and a Plus 2E, works great.
There is one minor problem with the plus dts patch though, the plus dts
includes / is based on the orangepi-2 dts since the plus is in essence
an extended opi-2.
So the emac bits really need to be added to the opi-2.dts first and
then extended / adjusted in the plus dts. I've attached 2 patches
doing this, replacing your original "ARM: dt: sun8i: Enable sun8i-emac
on the sun8i-h3-orangepi-plus" patch.
Note that the second one is based on your original, with minor changes
since it is now inheriting the emac settings from opi-2.dts and
(the bigger change actually) I've moved all added nodes around
to keep things sorted alphabetically.
In sunxi dts files we also sort everything alphabetically, so that
is something you should also (double)check in your other dts patches
before submitting them to Maxime.
Thanks & Regards,
Hans
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>From f07a2d5e410fa8220c8fb6c28a986e154876cf44 Mon Sep 17 00:00:00 2001
From: Hans de Goede <[email protected]>
Date: Fri, 26 Aug 2016 20:54:56 +0200
Subject: [PATCH 1/2] ARM: dt: sun8i: Enable sun8i-emac on the
sun8i-h3-orangepi-2
The Orange Pi 2 features 100Mbit ethernet support using the embedded
ethernet phy, this commit enables it.
Signed-off-by: Hans de Goede <[email protected]>
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index f89fe00..caa1a69 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -109,6 +109,17 @@
status = "okay";
};
+&emac {
+ phy = <&phy1>;
+ phy-mode = "mii";
+ allwinner,use-internal-phy;
+ allwinner,leds-active-low;
+ status = "okay";
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
--
2.9.3
>From fee3f429974272beb640fca09df9b337fbd9681c Mon Sep 17 00:00:00 2001
From: LABBE Corentin <[email protected]>
Date: Thu, 19 May 2016 09:39:20 +0200
Subject: [PATCH 2/2] ARM: dt: sun8i: Enable sun8i-emac on the
sun8i-h3-orangepi-plus
The sun8i-emac hardware is present on the Orange PI PC.
It uses an external PHY rtl8211e via RGMII.
This patch create the needed emac and phy nodes.
Signed-off-by: LABBE Corentin <[email protected]>
---
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 28f74f6..dbc3ef3 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -47,6 +47,18 @@
model = "Xunlong Orange Pi Plus / Plus 2 / Plus 2E";
compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_power_pin_orangepi>;
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
reg_usb3_vbus: usb3-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
@@ -68,6 +80,15 @@
status = "okay";
};
+&emac {
+ /* The Orange Pi Plus uses an external phy */
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-mode = "rgmii";
+ /delete-property/allwinner,use-internal-phy;
+};
+
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
@@ -98,6 +119,13 @@
};
&pio {
+ gmac_power_pin_orangepi: gmac_power_pin@0 {
+ allwinner,pins = "PD6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
usb3_vbus_pin_a: usb3_vbus_pin@0 {
allwinner,pins = "PG11";
allwinner,function = "gpio_out";
--
2.9.3
