On Wed, Mar 07, 2018 at 02:07:18AM +0000, Andre Przywara wrote: > The PWM controllers found in the Allwinner A64, H5 and H6 SoCs are fully > compatible to the PWM controllers found in the A13 and H3.
If fully compatible, then shouldn't there be a fallback to one of the existing compatible strings? > Add new compatible strings for those SoCs to the binding document, so > that they can be safely used, together with a fallback string > (preferably "allwinner,sun5i-a13-pwm"). > Add add the optionals "resets" property, needed by the H6. > > Signed-off-by: Andre Przywara <[email protected]> > --- > Documentation/devicetree/bindings/pwm/pwm-sun4i.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt > b/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt > index 51ff54c8b8ef..b3a127a0e58c 100644 > --- a/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt > +++ b/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt > @@ -7,11 +7,17 @@ Required properties: > - "allwinner,sun5i-a13-pwm" > - "allwinner,sun7i-a20-pwm" > - "allwinner,sun8i-h3-pwm" > + - "allwinner,sun50i-a64-pwm" > + - "allwinner,sun50i-h5-pwm" > + - "allwinner,sun50i-h6-pwm" > - reg: physical base address and length of the controller's registers > - #pwm-cells: should be 3. See pwm.txt in this directory for a description > of > the cells format. > - clocks: From common clock binding, handle to the parent clock. > > +Optional properties: > + - resets: shall be the reset control phandle for the PWM block, if > required. > + > Example: > > pwm: pwm@1c20e00 { > -- > 2.14.1 > -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
