The new Allwinner H6 SoC contains a USB3 PHY that is wired to the external USB3 pins of the SoC.
Add a device tree binding for the PHY. Signed-off-by: Icenowy Zheng <[email protected]> Reviewed-by: Chen-Yu Tsai <[email protected]> --- Changes in v5: - Dropped Vbus regulator and added connector subnode. Changes in v4: - Changed Vbus regulator property to vbus-supply. Changes in v3: - Added Chen-Yu's Review tag. No changes in v2, v1. .../bindings/phy/sun50i-usb3-phy.txt | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt diff --git a/Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt b/Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt new file mode 100644 index 000000000000..eeedc53e6360 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt @@ -0,0 +1,28 @@ +Allwinner sun50i USB3 PHY +----------------------- + +Required properties: +- compatible : should be one of + * allwinner,sun60i-h6-usb3-phy +- reg : a list of offset + length pairs +- #phy-cells : from the generic phy bindings, must be 0 +- clocks : phandle + clock specifier for the phy clock +- resets : phandle + reset specifier for the phy reset + +Optional nodes: +- connector : A sub-node required for representing the connector connected + to the USB PHY. See ../connector/usb-connector.txt for details. + +Example: + usb3phy: phy@5210000 { + compatible = "allwinner,sun50i-h6-usb3-phy"; + reg = <0x5210000 0x10000>; + clocks = <&ccu CLK_USB_PHY1>; + resets = <&ccu RST_USB_PHY1>; + #phy-cells = <0>; + + connector { + compatible = "usb-a-connector"; + label = "USB3"; + }; + }; -- 2.18.1 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
