Hi, On Sat, Apr 06, 2019 at 04:57:33AM +0800, Icenowy Zheng wrote: > The new Allwinner H6 SoC contains a USB3 PHY that is wired to the > external USB3 pins of the SoC. > > Add a device tree binding for the PHY. > > Signed-off-by: Icenowy Zheng <icen...@aosc.io> > Reviewed-by: Chen-Yu Tsai <w...@csie.org>
I know that this isn't the first iteration, and sorry if this comes out a bit late, but could you make a YAML schemas for this instead? Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
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