On Thu, Dec 31, 2020 at 03:29:38PM +0100, Paul Kocialkowski wrote: > Bits related to the interface data width are only applicable to the > parallel interface and are irrelevant when the CSI controller is taking > input from the MIPI CSI-2 controller. > > In prevision of adding support for this case, set these bits > conditionally so there is no ambiguity. The conditional block is > moved around before the interlaced conditional block for nicer code > symmetry (conditional blocks first) while at it. > > Co-developed-by: Kévin L'hôpital <[email protected]> > Signed-off-by: Kévin L'hôpital <[email protected]> > Signed-off-by: Paul Kocialkowski <[email protected]>
Acked-by: Maxime Ripard <[email protected]> Thanks! Maxime -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20210108095658.krhbyunsgp2dfq2y%40gilmour.
signature.asc
Description: PGP signature
