I'm trying to use USB driver on a SH4 architecture (SH7750 overdrive
board). The driver code assumes PCI/CPU cache coherency which is not the
case on SH4.
Has anyone already done this work for another architecture?
Does ohci-0323 and pcipool-0323 patches solve this problem?
Are there other additional patches to add?

On overdrive there is a restriction doing DMA across PCI. We can only
DMA from memory behind the PCI bus, so all the DMA' able memory must
come from there. The USB controller manipulates lists of descriptors
that are located in RAM and requires DMA access to these descriptors.
How can I support the driver's ability to  allocate these lists on
memory behind PCI bus (PCI DRAM non cacheable).

Best regards

Orazio Privitera.

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