David Brownell wrote:
>
> (Gary, your system clock is set well into the future; UTC?)
Yes UTC. It keeps Makefiles sane :-).
>
> Gary A. Gorgen wrote:
> > David Brownell wrote:
> >
> >>Thanks for the info about what 2.5.61 shows ... seems more polite.
> >>It doesn't seem to be giving you "Unrecoverable Error" (UE) failures,
> >>unlike the 2.4 "usb-ohci" code. (At least, not without more work!)
> >>
> >
> > The (UE) are very rare. 2 out of 100 maybe.
>
> They should be so rare that they never happen ... ;)
Haven't seen one of these in 2 days.
>
> >>><7>usb 5-1: urb ce02e500 usb-00:12.0-1 ep-2-IN cc 5 --> status -110
> >>><4>usbfs: USBDEVFS_BULK failed dev 5 ep 0x82 len 4096 ret -110
> >>
> >>... so basically the I/O is timing out on USB. Do you know why?
> >>
> >
> > Not a clue. :-(
> > The timeout to the read is 3 sec.
>
> That's a higher level timeout, in software. You're getting
> a lower level USB level timeout: device is not responding.
> If your devices are misbehaving, that can trigger other errors.
Can this timeout be changed ?
> You should find out more about this error. Can you put some kind
> of sniffer on the USB and watch the traffic? Resolving that issue
> might mean the other ones don't show up any more for you.
I'll try look at this with their "CATC", but it will be sometime next week.
This could be firmware problems with the parts.
I've already dug out several problems in their firmware.
Because the problem is port sensitive, I tend to think it's on my end.
But this could be coincidence.
> I saw some strange numbers come out of 2.4
>
> The 2.5 code should have some more verbose diagnostic options
> already. Enable them. I think those strange numbers on 2.4
> were symptoms of some previous problem ... and wouldn't be very
> surprised to know that both driver versions have the same bug.
What is the proper way to turn this on?
I have CONFIG_USB_DEBUG set.
I have turned off any standalone #undef DEBUG
Turned on #define OHCI_VERBOSE_DEBUG
Is there anything else?
>
> - Dave
Is there any timming restrictions between BCB -> DATA -> CSW.
I NEVER see a failure in the BCB phase.
They always occur in DATA or CSW.
Thanks for the help,
--
Gary A. Gorgen | "From ideas to PRODUCTS"
| Tunxis Design Inc.
[EMAIL PROTECTED] | 10470 Pineville Ave. Cupertino, Ca. 95014
| Phone: (408) 973-1542
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