[linux-usb-devel] [patch 2.5.66] ohci-hcd, pci posting paranoia

[David Brownell]

Flushes some posted PCI writes in case of trouble.
Lack of these hasn't been seen to be a problem; the
update mostly affects run-once init paths.  Thanks
to Arjan for the code-review comments.
Please merge to 2.5.latest; it also goes cleanly
on top of the 2.4 backport.
- Dave

--- 1.63/drivers/usb/host/ohci-hcd.c    Tue Mar  4 21:09:53 2003
+++ edited/drivers/usb/host/ohci-hcd.c  Fri Mar 28 07:45:41 2003
@@ -429,6 +429,8 @@
        ohci->hc_control = readl (&ohci->regs->control);
        ohci->hc_control &= OHCI_CTRL_RWC;      /* hcfs 0 = RESET */
        writel (ohci->hc_control, &ohci->regs->control);
+       // flush those pci writes
+       (void) readl (&ohci->regs->control);
        wait_ms (50);
 
        /* HC Reset requires max 10 us delay */
@@ -450,6 +452,8 @@
         * this if we write fmInterval after we're OPERATIONAL.
         */
        writel (ohci->hc_control, &ohci->regs->control);
+       // flush those pci writes
+       (void) readl (&ohci->regs->control);
 
        return 0;
 }
@@ -524,6 +528,8 @@
        writel (tmp, &ohci->regs->roothub.a);
        writel (RH_HS_LPSC, &ohci->regs->roothub.status);
        writel (0, &ohci->regs->roothub.b);
+       // flush those pci writes
+       (void) readl (&ohci->regs->control);
 
        // POTPGT delay is bits 24-31, in 2 ms units.
        mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
@@ -610,6 +616,8 @@
 
        writel (ints, &regs->intrstatus);
        writel (OHCI_INTR_MIE, &regs->intrenable);      
+       // flush those pci writes
+       (void) readl (&ohci->regs->control);
 }
 
 /*-------------------------------------------------------------------------*/
--- 1.64/drivers/usb/host/ohci-q.c      Mon Mar 17 16:32:26 2003
+++ edited/drivers/usb/host/ohci-q.c    Fri Mar 28 07:46:48 2003
@@ -446,6 +446,8 @@
        if (!ohci->sleeping) {
                writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
                writel (OHCI_INTR_SF, &ohci->regs->intrenable);
+               // flush those pci writes
+               (void) readl (&ohci->regs->control);
        }
 }