On Sun, 1 Jul 2007 21:02:11 -0700, David Brownell <[EMAIL PROTECTED]> wrote:
> As I understand it the actual mechanism is more like: platforms
> always set up a chunk of memory as uncached, and always map that
> through the IOMMU. Call that the DMA-{coherent,consistent} region.
>
> Utilities like dma_alloc_coherent() -- and hence usb_buffer_alloc(),
> dma_pool_*(), and so on -- return memory from that region.
>
> So the resources are *always* tied up; fixed overhead. What's visible
> to drivers is that per-transfer buffer operations are not needed.
No, they are normal pages, only uncached. They don't have to be in a
single contiguous region virtually or physically. There's no fixed size
allocation for it (at least, not on every architecture). Look at
arch/sparc/kernel/ioport.c:pci_alloc_consistent for an example.
On Intel, what you write is true in a way, in case of swiotlb.
The swiotlb reserves a real chunk of memory (still cached though).
That memory remains unavailable to normal users regardless
of the number and size of I/Os currently active in the system.
-- Pete
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