On Sat, May 4, 2019 at 10:13 PM Peter Chen <[email protected]> wrote:
>
>
> > > ---
> > > arch/arm/boot/dts/imx7ulp.dtsi | 30 ++++++++++++++++++++++++++++++
> > > 1 file changed, 30 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/imx7ulp.dtsi
> > > b/arch/arm/boot/dts/imx7ulp.dtsi index fca6e50f37c8..e2944f98eac6
> > > 100644
> > > --- a/arch/arm/boot/dts/imx7ulp.dtsi
> > > +++ b/arch/arm/boot/dts/imx7ulp.dtsi
> > > @@ -30,6 +30,7 @@
> > > serial1 = &lpuart5;
> > > serial2 = &lpuart6;
> > > serial3 = &lpuart7;
> > > + usbphy0 = &usbphy1;
> >
> > Drop this. You shouldn't need an alias.
> >
>
> It is a derived USB PHY and used on most of i.mx chipidea USB controllers.
> At the source code, we use aligned id to know the controller number.
>
> ret = of_alias_get_id(np, "usbphy");
> if (ret < 0)
> dev_dbg(&pdev->dev, "failed to get alias id, errno %d\n",
> ret);
> mxs_phy->port_id = ret;
fsl,anatop property should probably have cell to specify this.
>
> > > };
> > >
> > > cpus {
> > > @@ -133,6 +134,35 @@
> > > clock-names = "ipg", "per";
> > > };
> > >
> > > + usbotg1: usb@40330000 {
> > > + compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb",
> > > + "fsl,imx27-usb";
> > > + reg = <0x40330000 0x200>;
> > > + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> > > + clocks = <&pcc2 IMX7ULP_CLK_USB0>;
> > > + fsl,usbphy = <&usbphy1>;
> >
> > Don't use this for new users. Use the phy binding instead.
> >
>
> It is not a new user, the USB PHY used at imx7ulp is the same with imx6's.
New SoC is a new user. The chipidea core already supports using 'phys'
so you should be able to just use the common code.
Rob
