> From: Aaro Koskinen [mailto:aaro.koski...@iki.fi]
> Sent: Sunday, August 18, 2013 4:41 AM
>
> On Sat, Aug 17, 2013 at 08:44:18PM +0000, Paul Zimmerman wrote:
> > > It doesn't get very far:
> > >
> > > External DMA Mode not supported
> > > dwc2_hcd_init() FAILED, returning -22
> >
> > Hi Greg, all,
> >
> > After taking a look at the Octeon driver, it looks like that controller
> > uses a customized version of the DWC2 core - it has a different DMA
> > engine than the one provided by the standard hardware. So in fact these
> > two drivers are actually not "for the same hw".
>
> FWIW, I also tried forcing the DWC2 to non-DMA/FIFO mode, but could
> not get that working either. Do you support any HW running in slave
> mode? It seems the RX direction fails. I noticed the dwc2_read_packet()
> is hard-coded to channel 0 which looks odd, but changing that didn't
> change anything.
I have tested FIFO mode on x86 only. It looks like there may be a problem
with unaligned RX transfers on archs like ARM that have strict alignment
requirements. See this comment in dwc2_read_packet():
* Todo: Account for the case where dest is not dword aligned.
Hard-coding to FIFO 0 is correct for RX, since there is only one RX FIFO.
--
Paul
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