Based on FPGA ghrd(golden hardware reference design) hw design that includes gpio feature, add corresponding dts file to enable FPGA sw2, FPGA buttion and FPGA led. Create this dts file refer to below links from Intel SoC PFGA Community https://releases.rocketboards.org/release/dts-source/agilex/ https://releases.rocketboards.org/release/2021.11/dts-source/agilex/gsrd/
Signed-off-by: Meng Li <[email protected]> --- .../dts/intel/socfpga_agilex_socdk_ghrd.dts | 78 +++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_socdk_ghrd.dts diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_ghrd.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_ghrd.dts new file mode 100644 index 000000000000..55c81c033cff --- /dev/null +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_ghrd.dts @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021, Intel Corporation + */ + +#include "socfpga_agilex_socdk.dts" + +/{ + soc { + + led_pio: gpio@1080 { + compatible = "altr,pio-1.0"; + reg = <0xf9001080 0x8>; + altr,gpio-bank-width = <4>; + #gpio-cells = <2>; + gpio-controller; + resetvalue = <0>; + }; + + button_pio: gpio@1060 { + compatible = "altr,pio-1.0"; + reg = <0xf9001060 0x10>; + interrupt-parent = <&intc>; + interrupts = <0 18 4>; + altr,gpio-bank-width = <4>; + altr,interrupt-type = <2>; + altr,interrupt_type = <2>; + #gpio-cells = <2>; + gpio-controller; + }; + + dipsw_pio: gpio@1070 { + compatible = "altr,pio-1.0"; + reg = <0xf9001070 0x10>; + interrupt-parent = <&intc>; + interrupts = <0 17 4>; + altr,gpio-bank-width = <4>; + altr,interrupt-type = <3>; + altr,interrupt_type = <3>; + #gpio-cells = <2>; + gpio-controller; + }; + + trigger_pio: gpio@1040 { + compatible = "altr,pio-1.0"; + reg = <0xf9001040 0x20>; + altr,gpio-bank-width = <4>; + #gpio-cells = <2>; + gpio-controller; + resetvalue = <0>; + }; + + soc_leds: leds { + compatible = "gpio-leds"; + + led_fpga0: fpga0 { + label = "fpga_led0"; + gpios = <&led_pio 0 1>; + }; //end fpga0 (led_fpga0) + + led_fpga1: fpga1 { + label = "fpga_led1"; + gpios = <&led_pio 1 1>; + }; //end fpga1 (led_fpga1) + + led_fpga2: fpga2 { + label = "fpga_led2"; + gpios = <&led_pio 2 1>; + }; //end fpga2 (led_fpga2) + + led_fpga3: fpga3 { + label = "fpga_led3"; + gpios = <&led_pio 3 1>; + }; //end fpga3 (led_fpga3) + }; + + }; +}; -- 2.17.1
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