From: "Teoh, Ji Sheng" <[email protected]>
commit 37ee5829b06caa7fb4e47db5cebff332d6ab04de from
https://github.com/altera-opensource/linux-socfpga.git
This patch fixes QSE driver broken link speed configuration during
mac_config. During mac_config, the link speed is still unknown and
will only be set after mac_pcs_get_state is called. Hence, it is
more appropriate to check for state interface which is defined in
device tree phy-mode instead of link speed during mac_config.
The reason for this change is, commit e0f909bc3a24 ('net: switch to
using PHY_INTERFACE_MODE_10GBASER rather than 10GKR') that was
introduced in v5.10-lts.
Fix is applied to update the PHY interface to align with the upstream
change.
Signed-off-by: Teoh, Ji Sheng <[email protected]>
Signed-off-by: Wenlin Kang <[email protected]>
---
drivers/net/ethernet/altera/intel_fpga_qse_ll_main.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/altera/intel_fpga_qse_ll_main.c
b/drivers/net/ethernet/altera/intel_fpga_qse_ll_main.c
index 97c6a2fbaf1e..3b2d3afc080e 100644
--- a/drivers/net/ethernet/altera/intel_fpga_qse_ll_main.c
+++ b/drivers/net/ethernet/altera/intel_fpga_qse_ll_main.c
@@ -1237,7 +1237,7 @@ static void intel_fpga_qse_validate(struct phylink_config
*config,
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
if (state->interface != PHY_INTERFACE_MODE_NA &&
- state->interface != PHY_INTERFACE_MODE_10GKR) {
+ state->interface != PHY_INTERFACE_MODE_10GBASER) {
bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
return;
}
@@ -1254,7 +1254,7 @@ static void intel_fpga_qse_validate(struct phylink_config
*config,
switch (state->interface) {
case PHY_INTERFACE_MODE_NA:
- case PHY_INTERFACE_MODE_10GKR:
+ case PHY_INTERFACE_MODE_10GBASER:
phylink_set(mask, 10000baseT_Full);
phylink_set(mask, 10000baseCR_Full);
phylink_set(mask, 10000baseSR_Full);
@@ -1322,8 +1322,8 @@ static void intel_fpga_qse_mac_config(struct
phylink_config *config,
phy_csroffs(reconfig_busy), PHY_RECONFIG_BUSY)) {
csrwr32(0, priv->phy_reconfig_csr,
phy_csroffs(logical_chan_num));
- switch (state->speed) {
- case SPEED_10000:
+ switch (state->interface) {
+ case PHY_INTERFACE_MODE_10GBASER:
speed_reconfig |= (PHY_ETH_SPEED_10000 |
PHY_RECONFIG_START);
break;
--
2.25.1
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