Next day, next runs ;)
Here are the results.
I've also attached two lspci outputs
Current LB and boot with factory bios
As I say before, PCI 12.4 comes never up before the VGA Tries starts.
chris
-->snip
Done reading resources.
Looking at device Root Device
Looking at device PCI_DOMAIN: 0000
Looking at device PCI: 00:00.0
Looking at device PCI: 00:09.0
first onboard = PCI: 00:09.0
Looking at device PCI: 00:09.0
Looking at device PCI: 00:12.0
Looking at device PNP: 002e.0
Looking at device PNP: 002e.1
Looking at device PNP: 002e.2
Looking at device PNP: 002e.3
Skipping disabled device PNP: 002e.3
Looking at device PNP: 002e.4
Looking at device PNP: 002e.5
Looking at device PNP: 002e.6
Looking at device PNP: 002e.7
Looking at device PNP: 002e.8
Looking at device PCI: 00:12.1
Skipping disabled device PCI: 00:12.1
Looking at device PCI: 00:12.2
Looking at device PCI: 00:12.3
Skipping disabled device PCI: 00:12.3
Looking at device PCI: 00:12.4
Skipping disabled device PCI: 00:12.4
Looking at device PCI: 00:12.1
Looking at device PCI: 00:12.2
Looking at device PCI: 00:12.3
Looking at device PCI: 00:12.4
vga_first = PCI: 00:12.4
Looking at device PCI: 00:13.0
vga = PCI: 00:12.4
Looking at vga_onboard
Reassigning vga to PCI: 00:12.4
Allocating VGA resource PCI: 00:09.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Setting resources...
Root Device compute_allocate_io: base: 00001000 size: 00000080 align: 7 gran: 0
Root Device read_resources bus 0 link: 0
Root Device read_resources bus 0 link: 0 done
PCI: 00:12.2 20 * [0x00001000 - 0x0000107f] io
Root Device compute_allocate_io: base: 00001080 size: 00000080 align: 7 gran: 0
done
Root Device compute_allocate_mem: base: fd000000 size: 01003080 align: 24 gran: 0
Root Device read_resources bus 0 link: 0
Root Device read_resources bus 0 link: 0 done
PCI: 00:09.0 10 * [0xfd000000 - 0xfdffffff] mem
PCI: 00:12.4 10 * [0xfe000000 - 0xfe000fff] mem
PCI: 00:13.0 10 * [0xfe001000 - 0xfe001fff] mem
PCI: 00:12.1 10 * [0xfe002000 - 0xfe0020ff] mem
PCI: 00:12.3 10 * [0xfe003000 - 0xfe00307f] mem
Root Device compute_allocate_mem: base: fe003080 size: 01003080 align: 24 gran:
0 done
Root Device assign_resources, bus 0 link: 0
BC_DRAM_TOP = 0x03bfffff
MC_GBASE_ADD = 0x00000078
I would set ram size to 60 Mbytes
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem
PCI: 00:09.0 assign_resources, bus 0 link: 0
PCI: 00:09.0 assign_resources, bus 0 link: 0
PCI: 00:12.1 10 <- [0x00fe002000 - 0x00fe0020ff] mem
PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io
PCI: 00:12.3 10 <- [0x00fe003000 - 0x00fe00307f] mem
PCI: 00:12.4 10 <- [0x00fe000000 - 0x00fe000fff] mem
PCI: 00:13.0 10 <- [0x00fe001000 - 0x00fe001fff] mem
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Done allocating resources.
Enabling resources...
PCI: 00:00.0 cmd <- 147
PCI: 00:09.0 subsystem <- 00/00
PCI: 00:09.0 cmd <- 143
cs5530.c: cs5530_pci_dev_enable_resources()
PCI: 00:12.0 cmd <- 14f
PCI: 00:12.2 missing enable_resources
PCI: 00:12.1 cmd <- 142
PCI: 00:12.2 cmd <- 141
PCI: 00:12.3 cmd <- 142
PCI: 00:12.4 cmd <- 142
PCI: 00:13.0 cmd <- 142
done.
Initializing devices...
Root Device init
PCI: 00:00.0 init
northbridge: northbridge_init()
PCI: 00:09.0 init
PCI: 00:12.0 init
cs5530: southbridge_init
PNP: 002e.0 init
PNP: 002e.1 init
PNP: 002e.2 init
PNP: 002e.4 init
PNP: 002e.5 init
PNP: 002e.6 init
PNP: 002e.7 init
PNP: 002e.8 init
PCI: 00:12.1 init
PCI: 00:12.2 init
cs5530_ide: ide_init
PCI: 00:12.3 init
PCI: 00:12.4 init
PCI: 00:13.0 init
Devices initialized
Copying IRQ routing tables to 0xf0000...done.
Verifing copy of IRQ routing tables at 0xf0000...failed
Moving GDT to 0x500...ok
Wrote linuxbios table at: 00000530 - 000006c4 checksum e38
Welcome to elfboot, the open sourced starter.
January 2002, Eric Biederman.
Version 1.3
---> snap
lspci -vv //boot with current LB (vga relevant, only)
00:09.0 0300: 10ea:5000 (rev 02)
Subsystem: 0202:0202
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 0
Region 0: Memory at fd000000 (32-bit, non-prefetchable) [size=16M]
Expansion ROM at 08000000 [disabled] [size=64K]
// IO and MEM are initialized but it seems for the wrong adress
// memory is right?! is fd000000 different to d000000
// expansion Rom seems totaly wrong :D
00:12.4 0300: 1078:0104
Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Region 0: Memory at fe000000 (32-bit, non-prefetchable) [size=4K]
lspci -vv //complete output boot with factory bios
// there is no PCI 12.4
// first LB tries without CONFIG_PCI_ROM_RUN and CONFIG_CONSOLE_VGA looks
nearly same
// only 00:09.0 looks different, of course.
00:00.0 0600: 1078:0001
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Latency: 0
00:09.0 0300: 10ea:5000 (rev 02)
Subsystem: 0280:7000
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Latency: 32, Cache Line Size 08
Interrupt: pin A routed to IRQ 10
Region 0: Memory at d0000000 (32-bit, non-prefetchable) [size=16M]
Expansion ROM at <unassigned> [disabled] [size=64K]
00:12.0 0601: 1078:0100
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Latency: 64, Cache Line Size 04
00:12.1 0680: 1078:0101
Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Region 0: Memory at 40012000 (32-bit, non-prefetchable) [size=256]
00:12.2 0101: 1078:0102 (prog-if 80)
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Latency: 0
Region 4: I/O ports at f000 [size=16]
00:12.3 0401: 1078:0103
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Latency: 0
Region 0: Memory at 40011000 (32-bit, non-prefetchable) [size=128]
00:13.0 0c03: 0e11:a0f8 (rev 06) (prog-if 10)
Subsystem: 0e11:a0f8
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Latency: 32 (20000ns max), Cache Line Size 08
Interrupt: pin A routed to IRQ 11
Region 0: Memory at d2003000 (32-bit, non-prefetchable) [size=4K]
##
## Include the secondary Configuration files
##
dir /pc80
config chip.h
chip northbridge/amd/gx1
device pci_domain 0 on
device pci 0.0 on end
device pci 9.0 on // Is this on the right place ??
chip drivers/pci/onboard // first it was at the end of the file
device pci 9.0 on end
register "rom_address" = "0xfffc0000"
end
end
chip southbridge/amd/cs5530
device pci 12.0 on
chip superio/NSC/pc97317
device pnp 2e.0 on # Keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
end
device pnp 2e.1 on # Mouse
irq 0x70 = 12
end
device pnp 2e.2 on # RTC
io 0x60 = 0x70
irq 0x70 = 8
end
device pnp 2e.3 off # FDC
end
device pnp 2e.4 on # Parallel Port
io 0x60 = 0x378
irq 0x70 = 7
end
device pnp 2e.5 on # COM2
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 2e.6 on # COM1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.7 on # GPIO
io 0x60 = 0xe0
end
device pnp 2e.8 on # Power Management
io 0x60 = 0xe800
end
register "com1" = "{115200}"
register "com2" = "{38400}"
end
device pci 12.1 off end # SMI
device pci 12.2 on end # IDE
device pci 12.3 off end # Audio
device pci 12.4 off end # VGA
end
end
end
chip cpu/amd/model_gx1
end
end
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