I think we also need the static.c that is output.
ron
Ok,
#include <device/device.h>
#include <device/pci.h>
#include "/root/src/LinuxBIOSv2/src/superio/NSC/pc97317/chip.h"
#include "/root/src/LinuxBIOSv2/src/northbridge/amd/gx1/chip.h"
#include "/root/src/LinuxBIOSv2/src/mainboard/allwell/stb3036/chip.h"
#include "/root/src/LinuxBIOSv2/src/drivers/pci/onboard/chip.h"
struct device _dev3;
struct device _dev4;
struct device _dev6;
struct device _dev8;
struct device _dev19;
struct device _dev20;
struct device _dev21;
struct device _dev22;
struct device _dev10;
struct device _dev11;
struct device _dev12;
struct device _dev13;
struct device _dev14;
struct device _dev15;
struct device _dev16;
struct device _dev17;
struct device _dev18;
struct mainboard_allwell_stb3036_config mainboard_allwell_stb3036_info_0;
struct device **last_dev_p = &_dev22.next;
struct device dev_root = {
.ops = &default_dev_ops_root,
.bus = &dev_root.link[0],
.path = { .type = DEVICE_PATH_ROOT },
.enabled = 1,
.links = 1,
.on_mainboard = 1,
.link = {
[0] = {
.dev=&dev_root,
.link = 0,
.children = &_dev3,
},
},
.chip_ops = &mainboard_allwell_stb3036_ops,
.chip_info = &mainboard_allwell_stb3036_info_0,
.next = &_dev3,
};
struct northbridge_amd_gx1_config northbridge_amd_gx1_info_2;
struct device _dev3 = {
.ops = 0,
.bus = &dev_root.link[0],
.path = {.type=DEVICE_PATH_PCI_DOMAIN,.u={.pci_domain={ .domain = 0x0
}}},
.enabled = 1,
.on_mainboard = 1,
.link = {
[0] = {
.link = 0,
.dev = &_dev3,
.children = &_dev4,
},
},
.links = 1,
.chip_ops = &northbridge_amd_gx1_ops,
.chip_info = &northbridge_amd_gx1_info_2,
.next=&_dev4
};
struct device _dev4 = {
.ops = 0,
.bus = &_dev3.link[0],
.path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x0,0)}}},
.enabled = 1,
.on_mainboard = 1,
.link = {
},
.links = 0,
.sibling = &_dev6,
.chip_ops = &northbridge_amd_gx1_ops,
.chip_info = &northbridge_amd_gx1_info_2,
.next=&_dev6
};
struct drivers_pci_onboard_config drivers_pci_onboard_info_5 = {
.rom_address = 0xfffc0000,
};
struct device _dev6 = {
.ops = 0,
.bus = &_dev3.link[0],
.path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x9,0)}}},
.enabled = 1,
.on_mainboard = 1,
.link = {
},
.links = 0,
.sibling = &_dev8,
.chip_ops = &drivers_pci_onboard_ops,
.chip_info = &drivers_pci_onboard_info_5,
.next=&_dev8
};
struct device _dev8 = {
.ops = 0,
.bus = &_dev3.link[0],
.path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x12,0)}}},
.enabled = 1,
.on_mainboard = 1,
.link = {
[0] = {
.link = 0,
.dev = &_dev8,
.children = &_dev10,
},
},
.links = 1,
.next=&_dev10
};
struct superio_NSC_pc97317_config superio_NSC_pc97317_info_9 = {
.com1 = {115200},
.com2 = {38400},
};
struct device _dev19 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x12,1)}}},
.enabled = 0,
.on_mainboard = 1,
.link = {
},
.links = 0,
.sibling = &_dev20,
.next=&_dev20
};
struct device _dev20 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x12,2)}}},
.enabled = 1,
.on_mainboard = 1,
.link = {
},
.links = 0,
.sibling = &_dev21,
.next=&_dev21
};
struct device _dev21 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x12,3)}}},
.enabled = 0,
.on_mainboard = 1,
.link = {
},
.links = 0,
.sibling = &_dev22,
.next=&_dev22
};
struct device _dev22 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x12,4)}}},
.enabled = 0,
.on_mainboard = 1,
.link = {
},
.links = 0,
};
struct device _dev10 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x0
}}},
.enabled = 1,
.on_mainboard = 1,
.resources = 3,
.resource = {
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IO, .index=0x60, .base=0x60},
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IO, .index=0x62, .base=0x64},
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IRQ, .index=0x70, .base=0x1},
},
.link = {
},
.links = 0,
.sibling = &_dev11,
.chip_ops = &superio_NSC_pc97317_ops,
.chip_info = &superio_NSC_pc97317_info_9,
.next=&_dev11
};
struct device _dev11 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x1
}}},
.enabled = 1,
.on_mainboard = 1,
.resources = 1,
.resource = {
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IRQ, .index=0x70, .base=0xc},
},
.link = {
},
.links = 0,
.sibling = &_dev12,
.chip_ops = &superio_NSC_pc97317_ops,
.chip_info = &superio_NSC_pc97317_info_9,
.next=&_dev12
};
struct device _dev12 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x2
}}},
.enabled = 1,
.on_mainboard = 1,
.resources = 2,
.resource = {
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IO, .index=0x60, .base=0x70},
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IRQ, .index=0x70, .base=0x8},
},
.link = {
},
.links = 0,
.sibling = &_dev13,
.chip_ops = &superio_NSC_pc97317_ops,
.chip_info = &superio_NSC_pc97317_info_9,
.next=&_dev13
};
struct device _dev13 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x3
}}},
.enabled = 0,
.on_mainboard = 1,
.link = {
},
.links = 0,
.sibling = &_dev14,
.chip_ops = &superio_NSC_pc97317_ops,
.chip_info = &superio_NSC_pc97317_info_9,
.next=&_dev14
};
struct device _dev14 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x4
}}},
.enabled = 1,
.on_mainboard = 1,
.resources = 2,
.resource = {
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IO, .index=0x60, .base=0x378},
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IRQ, .index=0x70, .base=0x7},
},
.link = {
},
.links = 0,
.sibling = &_dev15,
.chip_ops = &superio_NSC_pc97317_ops,
.chip_info = &superio_NSC_pc97317_info_9,
.next=&_dev15
};
struct device _dev15 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x5
}}},
.enabled = 1,
.on_mainboard = 1,
.resources = 2,
.resource = {
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IO, .index=0x60, .base=0x2f8},
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IRQ, .index=0x70, .base=0x3},
},
.link = {
},
.links = 0,
.sibling = &_dev16,
.chip_ops = &superio_NSC_pc97317_ops,
.chip_info = &superio_NSC_pc97317_info_9,
.next=&_dev16
};
struct device _dev16 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x6
}}},
.enabled = 1,
.on_mainboard = 1,
.resources = 2,
.resource = {
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IO, .index=0x60, .base=0x3f8},
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IRQ, .index=0x70, .base=0x4},
},
.link = {
},
.links = 0,
.sibling = &_dev17,
.chip_ops = &superio_NSC_pc97317_ops,
.chip_info = &superio_NSC_pc97317_info_9,
.next=&_dev17
};
struct device _dev17 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x7
}}},
.enabled = 1,
.on_mainboard = 1,
.resources = 1,
.resource = {
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IO, .index=0x60, .base=0xe0},
},
.link = {
},
.links = 0,
.sibling = &_dev18,
.chip_ops = &superio_NSC_pc97317_ops,
.chip_info = &superio_NSC_pc97317_info_9,
.next=&_dev18
};
struct device _dev18 = {
.ops = 0,
.bus = &_dev8.link[0],
.path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x8
}}},
.enabled = 1,
.on_mainboard = 1,
.resources = 1,
.resource = {
{ .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED |
IORESOURCE_IO, .index=0x60, .base=0xe800},
},
.link = {
},
.links = 0,
.sibling = &_dev19,
.chip_ops = &superio_NSC_pc97317_ops,
.chip_info = &superio_NSC_pc97317_info_9,
.next=&_dev19
};
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