Quoting Marc Jones <[EMAIL PROTECTED]>:
>
>
> Joseph Smith wrote:
>> Quoting Corey Osgood <[EMAIL PROTECTED]>:
>>
>>> yhlu wrote:
>>>> just provide one fake spd array...
>>>>
>>>> YH
>>> My thoughts exactly. You can't write to the smbus because there's no
>>> device on the smbus at that location to receive those writes.
>>>
>>> -Corey
>>>
>>>
>> How would I provide a fake spd array? Here is the situation. My
>> board has the onboard memory without a SPD, I could just hardcode
>> this into the northbridge raminit.c. But I don't want to do that
>> so people that may want to use the northbridge src for other
>> boards won't have to deal with it. So right now I have auto.c call
>> a function that runs in between sdram_set_spd_registers and
>> sdram_enable, like this:
>>
>> sdram_set_spd_registers(memctrl);
>> onboard_sdram_set_registers(memctrl);
>> sdram_enable(0, memctrl);
>>
>> This function, onboard_sdram_set_registers manually sets up the regsters.
>>
>> Anyways I would also like to get the smbus_write_byte write going
>> to setup my tv-out registers on my tv-out chip?
>>
>> Thanks - Joe
>>
>
> Joe,
> There is an example of an spd array in
> mainboard/artecgroup/dbe61/cache_as_ram_auto.c spd_read_byte(). You
> will have to generate the correct SPD values for your memory.
>
> Is the normal smbus_write_byte not working?
>
> Marc
>
>
Thanks everyone for your help. No, the smbus_write_byte is commented
out and has a big FIXME. I assume the code just never got finished??
static void smbus_write_byte(unsigned device, unsigned address,
unsigned char val)
{
if (smbus_wait_until_ready(SMBUS_IO_BASE) < 0) {
return;
}
print_debug("Unimplemented smbus_write_byte() called.\r\n");
#if 0
/* setup transaction */
/* disable interrupts */
outw(inw(SMBUS_IO_BASE + SMBGCTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)),
SMBUS_IO_BASE + SMBGCTL);
/* set the device I'm talking too */
outw(((device & 0x7f) << 1) | 1, SMBUS_IO_BASE + SMBHSTADDR);
outb(address & 0xFF, SMBUS_IO_BASE + SMBHSTCMD);
/* set up for a byte data write */ /* FIXME */
outw((inw(SMBUS_IO_BASE + SMBGCTL) & ~7) | (0x1), SMBUS_IO_BASE +
SMBGCTL);
/* clear any lingering errors, so the transaction will run */
/* Do I need to write the bits to a 1 to clear an error? */
outw(inw(SMBUS_IO_BASE + SMBGSTATUS), SMBUS_IO_BASE + SMBGSTATUS);
/* clear the data word...*/
outw(val, SMBUS_IO_BASE + SMBHSTDAT);
/* start the command */
outw((inw(SMBUS_IO_BASE + SMBGCTL) | (1 << 3)), SMBUS_IO_BASE +
SMBGCTL);
/* poll for transaction completion */
smbus_wait_until_done(SMBUS_IO_BASE);
#endif
return;
}
Thanks - Joe
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