[EMAIL PROTECTED] writes:
> On 2 Jan, Eric W. Biederman wrote:
> > Ronald G Minnich <[EMAIL PROTECTED]> writes:
> >
> >> On Fri, 22 Dec 2000, Bernhard Kuhn wrote:
> >>
> >> > Realy interessting point! But if the factory default bios
> >> > behaves that way, then iŽd like to say award has done a realy
> >> > bad job :-)
> >>
> >> actually, based on what we've seen from what the BIOSes due, Award has
> >> done a really bad job.
> >>
> >> But, reading the SDRAM spec, I have sympathy for BIOS assembly coders. I
> >> think the guys who wrote the SDRAM spec were mentally impaired. You should
> >> see all the parameters in that SDRAM EEPROM! Why would those guys have
> >> thought you could process something that complex WITH NO MEMORY
> >> WORKING? Duh ...
> >
> > Ron I thought of a passable work around to the no ram problem, during
> > memory init. Turn on L1 cache and initialize it. Then you run in cache
> > while you are initializing memory. It's not fool proof and I still need
> > to see if I can do it, but it looks to me like this will allow memory
> > init to be done in C code.
> >
> > Eric
>
> This would be REALLY cool if it worked.
>
> I think that the cache should flush and therefore "initialize" the ram
> correctly as soon as you "overflow" the cache. ...just need to make
> sure that the flush/invalidate type stuff doesn't kill you.
I'm thinking of using an area of physical memory where RAM isn't mapped.
ROM or someplace. So I don't have silly writes coming through, and I notice it if
something flushes the cache.
I'm hoping to get there soon, I'm a few bugfixes away from getting kexec
up on the alpha.
Eric
