You could configure teh MTRR registers to make a region WB. But it will still be tricky to make sure no unexpected writes happen to an area pointing at SDRAM, since that will foul up the SDRAM control hardware and/or the SDRAM itself. We've also seen cases where unexpected writes to memory will blow the hardware up and cause a trap (intel). But, what a GREAT hack this would be ... ron
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- Re: A7V progresses Ronald G Minnich
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- Re: A7V progresses Bernhard Kuhn
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