Re: SiS 630: Problem with enabling the CPU pipeline

[Richard A. Smith]

On Fri, 19 Jan 2001 12:21:24 -0600, Eric Seppanen wrote:

>If you really want to be friendly to bare-bones embedded or thin-client 
>systems, you could even make the fail-safe vs. agressive stuff able to be
>compiled out, because it's conceivable that an embedded board might not
>have battery-backed cmos ram-- I don't.

Isn't CMOS normally located in the real-time clock chip?  If so then our board dosn't 
have it 
either.


--
Richard A. Smith                         Bitworks, Inc.               
[EMAIL PROTECTED]               501.846.5777                        
Sr. Design Engineer        http://www.bitworks.com