Eric W. Biederman <[EMAIL PROTECTED]>:
> In this case the dual athlon motherboard the Tyan Thunder K7/ Tyan
> Guiness/ what ever other names it has, has 4 pci interrupt lines that
> feed into the AMD766 southbridge. There is a 2 byte routing register in
> subfuction 3, offset 0x56, that has a set of mappings from 4 irq pins
> to isa interrupts. The stock BIOS mapping is:
>
> PIRQA -> 10
> PIRQB -> 5
> PIRQC -> 3
> PIRQD -> 11
>
> When I looked nothing else uses those ISA interrupts, so having a
> conflict would suprise me.
Here's what we saw with the magic setting "Use PCI Interupt Entries in MP
table" off, SB Live! in slot 4:
3 Serial port 1
4 Serial port 0
5 SCSI controller 1
7 Parallel port
10 SCSI controller 2, Radeon
11 USB controller, SB Live!, NIC #2.
15 NIC #1
Moving the SB! Live to slot 5 changed its IRQ from 11 to 5. We had
lockups with this configuration whether the card was in slot 4 or 5.
> As far as I can tell all the "Use PCI Interupt Entries in MP table"
> does when enable is:
>
> In the ioapic and probably the i82559 disable interrupts 3,5,10,11.
> Assign irqs with higher numbers. (I.e. the pci irq field)
> In the ioapic enable pins 0x10 - 0x13 and use the higher numbered
> interrupts.
> List these interupts in the MP table.
>
> And when "Use PCI Interrupt Entries in MP table" is disabled:
>
> In the ioapic and the i82559 enable interrupts 3,5,10,11.
> Assign irqs to the devices with the low numbers.
> In the ioapic disable pins 0x10 - 0x13.
> Don't list the higher alias in the MP table.
>
> So I don't see how that can be your problem, unless the i82559
> acknowledgement logic is locking you up or you moved the problematic
> card to a different slot.
When we set the "ISA interrupts in MP table" option in the BIOS, with
the SB Live! in slot 5, we saw this.
16 Adaptec #1, SB Live!
17 Adaptec #2, Radeon
18 NIC #1
19 NIC #2, USB controller
No lockups with this configuration.
--
<a href="http://www.tuxedo.org/~esr/";>Eric S. Raymond</a>
If a thousand men were not to pay their tax-bills this year, that would
... [be] the definition of a peaceable revolution, if any such is possible.
-- Henry David Thoreau
