reset_vector in ipl.S

[Collins Chen]

Dear Ron,
     I just have a question about cpu reset_vector in ipl.S.
     In ipl.S the reset_vector is defined as 0xfe1f0 or 0x1f0, but as we all
known, cpu go to 0xfffe0 to fetch the first instruction when power-on. Don't it
conflict? How disk-on-chip solve this problem?
Thanks!

Regards,
Collins