On Friday 14 December 2001 00:59, Collins Chen wrote: > Dear Ron, > I just have a question about cpu reset_vector in ipl.S. > In ipl.S the reset_vector is defined as 0xfe1f0 or 0x1f0, but as we > all known, cpu go to 0xfffe0 to fetch the first instruction when power-on. > Don't it conflict? How disk-on-chip solve this problem?
For the ipl.S, the address space is 512 bytes, starting at 0. This 512 bytes lives at then end of the 1M space, by the addressing, so you have to add the 0x1f0 to 0xff100, which gets 0xffff0 ron
