Ronald G Minnich wrote: > > On Wednesday 19 December 2001 16:59, Eric W. Biederman wrote: > > Ronald G Minnich <[EMAIL PROTECTED]> writes: > > > We just tried an interesting experiment. We set the DRB for the first row > > > of the 430TX to zero, so that we actually initialized the second row. > > > That worked. > > > > > > Then we set the first row to a known good size, tried to init the first > > > row. That failed. > > > Hmm. I wonder if only one row may be set to a reasonable size in the DRB at > > a time for the init to work? > > we set the rows as follows: > 0,10,10,10,10,10 > then did (we think) row 1 > Then set > 10,10,10,10,10,10 > Then tried to do row 0, but it locked up. > > ron
Could have sworn this is what my Pentium 430TX PC did way back when (before it gave its life for the cause). The last thing I did before starting to port LinuxBIOS for my BX board was to capture with the ICE the BX PC's BIOS doing that. It was a revelation that no matter which row was enabled in the BX regs, software always pounded on addresses at the bottom of memory for SDRAM init. It worked for 2 rows when I tried the LinuxBIOS in the BX PC, but not for 4 in our real target. So the BX board (4 rows 64MB/row) blasts all 4 rows at once now and the TX board (2 rows 32MB/row) is stuck with 1 row for now.
