Thanks guys.
----- Original Message ----- >From: "Ronald G Minnich" <[EMAIL PROTECTED]> >To: "Ollie Lho" <[EMAIL PROTECTED]> >Subject: Re: couple of Q's - SMBus >Date: Tue, 05 Feb 2002 09:02:14 -0700 > > On Tue, 5 Feb 2002, Ollie Lho wrote: > > > READ Write > > > > DIMM 0 0xa1 0xa0 > > > > DIMM 1 0xa3 0xa2 > > DIMM 2 0xa5 0xa4 > > > > yes, so the address is 0x50, and the lowest-ordered bit of the address in > the packet header is read or write. > > So the packet header has 0xa0 for write, 0xa1 for read, etc. > > ron > >
