"Richard A. Smith" <[EMAIL PROTECTED]> writes: > I've spend some time messing with my trying to dump my RAM info. > > So far the problem seems to be that the SPD reads allways comback > either 0x04 or 0x00. The 0x00 is a guess since it looks like the > code will skip the dimm if it reads back a 0x00 > > But I do get 0x04s... Whole blocks of them. > > Data sheet says that a 0x04 is a device error that can be caused by a > timeout. So perhaps the code is not really putting out the proper > spd address or someting.
Or something isn't initialized yet. > If I use the spdscan program with my general software device it finds > the DIMM and gets its size correctly. So it appears possible to do the SPD thing. > I've looked on the SCL and SDA lines while LB is trying to read > (Made the code read from 00 to 0xff) and I can see clock and data > happening so I know the piix4e is at least setup correctly enough to > output. > > The spd address is kind of confusing. Am I correct that the (0x0a << > 3) for the start address is only shifted 3 bits because the > spd_read_byte code shifts it one more bit to the left. DIMMS hard code all but the last 3 bits of the 7bit spd address. The value passed to spd_read_byte is the address, and not the address + r/w direciton. > I'm going to try and grab a full SPD read and see if the wire data is > correct. The intel docs claim that on the 9th bit the receiveing > device is supposed to pull SDA low for an ack. Sounds worth a shot. Eric
