From: Roy Zang <[EMAIL PROTECTED]>

Add PCI/PCI Express node for 8544DS board.

---
 arch/powerpc/boot/dts/mpc8544ds.dts |  211 +++++++++++++++++++++++++++++++++++
 1 files changed, 211 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts 
b/arch/powerpc/boot/dts/mpc8544ds.dts
index 43bf5c1..aab0bc6 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -143,6 +143,217 @@
                        fsl,has-rstcr;
                };
 
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8540-pci";
+                       device_type = "pci";
+                       interrupt-map-mask = <f800 0 0 7>;
+                       interrupt-map = <
+
+                               /* IDSEL 0x11 J17 Slot 1 */
+                               8800 0 0 1 &mpic 2 1
+                               8800 0 0 2 &mpic 3 1
+                               8800 0 0 3 &mpic 4 1
+                               8800 0 0 4 &mpic 1 1
+
+                               /* IDSEL 0x12 J16 Slot 2 */
+
+                               9000 0 0 1 &mpic 3 1
+                               9000 0 0 2 &mpic 4 1
+                               9000 0 0 3 &mpic 2 1
+                               9000 0 0 4 &mpic 1 1>;
+
+                       interrupt-parent = <&mpic>;
+                       interrupts = <18 2>;
+                       bus-range = <0 ff>;
+                       ranges = <02000000 0 80000000 80000000 0 10000000
+                                 01000000 0 00000000 e2000000 0 00800000>;
+                       clock-frequency = <3f940aa>;
+                       #interrupt-cells = <1>;
+                       #size-cells = <2>;
+                       #address-cells = <3>;
+                       reg = <8000 1000>;
+               };
+
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8548-pcie";
+                       device_type = "pci";
+                       #interrupt-cells = <1>;
+                       #size-cells = <2>;
+                       #address-cells = <3>;
+                       reg = <a000 1000>;
+                       bus-range = <0 ff>;
+                       ranges = <02000000 0 90000000 90000000 0 10000000
+                                 01000000 0 00000000 e2800000 0 00800000>;
+                       clock-frequency = <1fca055>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <19 2>;
+                       interrupt-map-mask = <f800 0 0 7>;
+                       interrupt-map = <
+                               /* IDSEL 0x0 */
+                               0000 0 0 1 &mpic 0 1
+                               0000 0 0 2 &mpic 1 1
+                               0000 0 0 3 &mpic 2 1
+                               0000 0 0 4 &mpic 3 1
+                               >;
+               };
+
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8548-pcie";
+                       device_type = "pci";
+                       #interrupt-cells = <1>;
+                       #size-cells = <2>;
+                       #address-cells = <3>;
+                       reg = <9000 1000>;
+                       bus-range = <0 ff>;
+                       ranges = <02000000 0 a0000000 a0000000 0 10000000
+                                 01000000 0 00000000 e3000000 0 00800000>;
+                       clock-frequency = <1fca055>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <1a 2>;
+                       interrupt-map-mask = <f800 0 0 7>;
+                       interrupt-map = <
+                               /* IDSEL 0x0 */
+                               0000 0 0 1 &mpic 4 1
+                               0000 0 0 2 &mpic 5 1
+                               0000 0 0 3 &mpic 6 1
+                               0000 0 0 4 &mpic 7 1
+                               >;
+               };
+
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8548-pcie";
+                       device_type = "pci";
+                       #interrupt-cells = <1>;
+                       #size-cells = <2>;
+                       #address-cells = <3>;
+                       reg = <b000 1000>;
+                       bus-range = <0 ff>;
+                       ranges = <02000000 0 b0000000 b0000000 0 10000000
+                                 01000000 0 00000000 e3800000 0 00800000>;
+                       clock-frequency = <1fca055>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <1b 2>;
+                       interrupt-map-mask = <f800 0 0 7>;
+                       interrupt-map = <
+
+                               // IDSEL 0x1a
+                               d000 0 0 1 &i8259 6 2
+                               d000 0 0 2 &i8259 3 2
+                               d000 0 0 3 &i8259 4 2
+                               d000 0 0 4 &i8259 5 2
+
+                               // IDSEL 0x1b
+                               d800 0 0 1 &i8259 5 2
+                               d800 0 0 2 &i8259 0 0
+                               d800 0 0 3 &i8259 0 0
+                               d800 0 0 4 &i8259 0 0
+
+                               // IDSEL 0x1c  USB
+                               e000 0 0 1 &i8259 9 2
+                               e000 0 0 2 &i8259 a 2
+                               e000 0 0 3 &i8259 c 2
+                               e000 0 0 4 &i8259 7 2
+
+                               // IDSEL 0x1d  Audio
+                               e800 0 0 1 &i8259 9 2
+                               e800 0 0 2 &i8259 a 2
+                               e800 0 0 3 &i8259 b 2
+                               e800 0 0 4 &i8259 0 0
+
+                               // IDSEL 0x1e Legacy
+                               f000 0 0 1 &i8259 c 2
+                               f000 0 0 2 &i8259 0 0
+                               f000 0 0 3 &i8259 0 0
+                               f000 0 0 4 &i8259 0 0
+
+                               // IDSEL 0x1f IDE/SATA
+                               f800 0 0 1 &i8259 6 2
+                               f800 0 0 2 &i8259 0 0
+                               f800 0 0 3 &i8259 0 0
+                               f800 0 0 4 &i8259 0 0
+                       >;
+                       [EMAIL PROTECTED] {
+                               reg = <0 0 0 0 0>;
+                               #size-cells = <2>;
+                               #address-cells = <3>;
+                               ranges = <02000000 0 a0000000
+                                         02000000 0 a0000000
+                                         0 10000000
+                                         01000000 0 00000000
+                                         01000000 0 00000000
+                                         0 00080000>;
+
+                               [EMAIL PROTECTED] {
+                                       reg = <0 0 0 0 0>;
+                                       #size-cells = <2>;
+                                       #address-cells = <3>;
+                                       ranges = <02000000 0 80000000
+                                                 02000000 0 80000000
+                                                 0 20000000
+                                                 01000000 0 00000000
+                                                 01000000 0 00000000
+                                                 0 00100000>;
+
+                                       [EMAIL PROTECTED] {
+                                               device_type = "isa";
+                                               #interrupt-cells = <2>;
+                                               #size-cells = <1>;
+                                               #address-cells = <2>;
+                                               reg = <f000 0 0 0 0>;
+                                               ranges = <1 0 01000000 0 0
+                                                         00001000>;
+                                               interrupt-parent = <&i8259>;
+
+                                               i8259: [EMAIL PROTECTED] {
+                                                       reg = <1 20 2
+                                                              1 a0 2
+                                                              1 4d0 2>;
+                                                       clock-frequency = <0>;
+                                                       interrupt-controller;
+                                                       device_type = 
"interrupt-controller";
+                                                       #address-cells = <0>;
+                                                       #interrupt-cells = <2>;
+                                                       built-in;
+                                                       compatible = "chrp,iic";
+                                                       interrupts = <9 2>;
+                                                       interrupt-parent =
+                                                               <&mpic>;
+                                               };
+
+                                               [EMAIL PROTECTED] {
+                                                       #size-cells = <0>;
+                                                       #address-cells = <1>;
+                                                       reg = <1 60 1 1 64 1>;
+                                                       interrupts = <1 3 c 3>;
+                                                       interrupt-parent =
+                                                               <&i8259>;
+
+                                                       [EMAIL PROTECTED] {
+                                                               reg = <0>;
+                                                               compatible = 
"pnpPNP,303";
+                                                       };
+
+                                                       [EMAIL PROTECTED] {
+                                                               reg = <1>;
+                                                               compatible = 
"pnpPNP,f03";
+                                                       };
+                                               };
+
+                                               [EMAIL PROTECTED] {
+                                                       compatible =
+                                                               "pnpPNP,b00";
+                                                       reg = <1 70 2>;
+                                               };
+
+                                               [EMAIL PROTECTED] {
+                                                       reg = <1 400 80>;
+                                               };
+                                       };
+                               };
+                       };
+
+               };
+
                mpic: [EMAIL PROTECTED] {
                        clock-frequency = <0>;
                        interrupt-controller;
-- 
1.5.1




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