For MPC8349E input to SPIBRG is SYSCLK, but it's SYSCLK/2 for
MPC8323E (running in so-called "QE mode").
This fixes clocking issues I've noticed recently.
Probably someday mpc83xx_spi->sysclk should be renamed to
mpc83xx_spi->spiclk to be less confusing.
Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
---
drivers/spi/spi_mpc83xx.c | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index 0c16a2b..55230f7 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -429,13 +429,17 @@ static int __init mpc83xx_spi_probe(struct
platform_device *dev)
mpc83xx_spi->bitbang.chipselect = mpc83xx_spi_chipselect;
mpc83xx_spi->bitbang.setup_transfer = mpc83xx_spi_setup_transfer;
mpc83xx_spi->bitbang.txrx_bufs = mpc83xx_spi_bufs;
- mpc83xx_spi->sysclk = pdata->sysclk;
mpc83xx_spi->activate_cs = pdata->activate_cs;
mpc83xx_spi->deactivate_cs = pdata->deactivate_cs;
mpc83xx_spi->qe_mode = pdata->qe_mode;
mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8;
mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8;
+ if (mpc83xx_spi->qe_mode)
+ mpc83xx_spi->sysclk = pdata->sysclk / 2;
+ else
+ mpc83xx_spi->sysclk = pdata->sysclk;
+
mpc83xx_spi->rx_shift = 0;
mpc83xx_spi->tx_shift = 0;
if (mpc83xx_spi->qe_mode) {
--
1.5.0.6
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