On 08/09/2016 10:45 PM, Andrew Donnellan wrote:
I'm currently working on a cxl defect found by an IBM test team where we run into this - will review this patch more thoroughly and test it shortly.
Gavin provided a review/suggestions via chat, pointing to rely on the refcount that already exists in the PCI subsystem (not reinvent another) and leverage the release of the PCI root bus -- which is much simpler! He replied there should be no problems w/ the EEH reset path (PCI root bus not released) nor w/ other structs w/ refs to the PHB (PCI DN, EEH PE, EEH DEV). I'll go down that path for a PATCH v3. -- Mauricio Faria de Oliveira IBM Linux Technology Center
