On Fri, 17 Jul 2026 17:27:00 -0500 Terry Bowman <[email protected]> wrote:
> Restricted CXL Host (RCH) error handling is a separate path from the > new CXL Port error handling flow. Fold RCH error handling into the > Port flow so both share a common entry point. > > Update cxl_rch_handle_error_iter() to forward RCH protocol errors > through the AER-CXL kfifo. Change cxl_rch_handle_error() return type > from void to bool so handle_error_source() can determine whether work > was enqueued and call cxl_proto_err_flush() before AER recovery > proceeds. > > For RC_END devices, __cxl_proto_err_work_fn() calls Can we refer to these as RCiEPs to match the spec? I have no idea where RC_END naming came from but to me it isn't obviously that same thing. Or talk about the narrow case of RCDs here as well. > cxl_handle_rdport_errors() to process RCH Downstream Port errors, > then falls through to the VH path for RC_END Endpoint handling. > > An RCD uncorrectable CXL RAS error now panics via cxl_do_recovery(). > Before this patch the RCH Downstream Port UCE path called > cxl_handle_ras() but ignored its return value - no panic. After this > patch the same condition calls cxl_do_recovery() which panics on > confirmed UCE. The Endpoint UCE path already panicked at the parent > commit. This matches the panic policy added in the common CXL Port > protocol error flow. > > Remove cxl_cor_error_detected() and its .cor_error_detected > registration in cxl_error_handlers. Correctable Endpoint errors are > now routed through the AER-CXL kfifo like all other CXL protocol > errors. > > Drop the cxlds->rcd / cxl_handle_rdport_errors(cxlds) branches from > cxl_error_detected(). RCH downstream port error handling is now > performed by __cxl_proto_err_work_fn() via the kfifo path, which > calls cxl_handle_rdport_errors(pdev) before the common dispatch. > > Change cxl_handle_rdport_errors() to take a struct pci_dev * instead > of a struct cxl_dev_state *, matching the new caller context. Re-fetch > dport under guard() to close the TOCTOU window between > cxl_pci_find_port()'s lockless xa_load() and the first dereference of > the returned pointer. > > Change find_cxl_port_by_dev() RC_END lookup from > find_cxl_port_by_dport(dev->parent) to find_cxl_port_by_uport(dev), > matching the Endpoint lookup path. RC_END Endpoint port resolution > uses the uport (the RC_END device itself), while the separate RCH > Downstream Port lookup is handled by cxl_handle_rdport_errors(). > > The RCH Downstream Port and the RCD Endpoint (RC_END) are separate > devices with independent RAS register blocks. cxl_handle_rdport_errors() > handles the RCH Downstream Port RAS. RCD Endpoint (RC_END) is handled in > cxl_handle_proto_error(). > > Use to_ras_base() in cxl_handle_rdport_errors() instead of referencing > dport->regs.ras directly. Make to_ras_base() non-static in ras.c and > declare it in core.h so ras_rch.c can access it. Route all RAS base address > lookups > through a single helper to prepare for CXL RAS error injection testing > that follows this series. > > Signed-off-by: Terry Bowman <[email protected]> > Other than taking another look at the patch description and seeing if it can be more concise, this one looks fine to me. Jonathan
