Wolfgang Denk <w...@denx.de> wrote on 07/05/2009 11:19:48:
> 
> Dear Joakim Tjernlund,
> 
> In message 
<of97606123.49b50465-onc12575af.002e2518-c12575af.002e6...@transmode.se> 
you wrote:
> >
> > Just a stab in the dark: Perhaps the fec->fecp->fec_mii_speed field is
> > misaligned or is 16 bits ?
> 
> Good idea. The RM documents the register at offset 0x44 and describes
> it as 32 bits... and it's working fine on the MPC5121ADS  board,  but
> fails on ARIA.

OK, this is just a guess too: Some odd byte order requirements?
No more ideas, sorry.

 Jocke
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