In message <[EMAIL PROTECTED]> you wrote: > This is mostly updating the PCI Express code to work with the new core > in the Rev. B chip, which unfortunately has different undocumented > restrictions on the PLB addresses that can be used from the Rev. A core. > > Also, when adding the cputable entry for 440SPe Rev. B, we need to > adjust the entry for 440SP Rev. A so that it looks at more bits of the > PVR. The 440SPe Rev. B has PVR 53421891, which would have matched the > old 440SP pattern of 53xxx891. > > Signed-off-by: Roland Dreier <[EMAIL PROTECTED]>
Just for the record: This patch is _heavily_ borrowed on code by Rafal Jaworowski; see http://www.denx.de/cgi-bin/gitweb.cgi?p=linux-2.6-denx.git;a=commit;h=30e3e3be8863902f508af74fdc61ec9b80756bc0 Please add correct attribution. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED] "In Christianity neither morality nor religion come into contact with reality at any point." - Friedrich Nietzsche _______________________________________________ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
