Hi all,
Working with a board using hdlc over SCC channel (852T) and kernel 2.4.21,
in the cpm reset code in arch/ppc/8xx_io/commproc.c it's like:
void
m8xx_cpm_reset()
{
volatile immap_t *imp;
volatile cpm8xx_t *commproc;
pte_t *pte;
imp = (immap_t *)IMAP_ADDR;
commproc = (cpm8xx_t *)&imp->im_cpm;
#ifdef CONFIG_UCODE_PATCH
/* Perform a reset.
*/
commproc->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG);
/* Wait for it.
*/
while (commproc->cp_cpcr & CPM_CR_FLG);
cpm_load_patch(imp);
#endif
.......
In our case, CONFIG_UCODE_PATCH is not defined so the commproc is never
reseted during reboot. Could it be that the #ifdef CONFIG_UCODE_PATCH
should just be around the cpm_load_patch command?
The CONFIG_UCODE_PATCH seems to point this to be i2c/spi patch, but
shouldn't a reset go to cpm in anycase?
/Per
