Thanks for replying,
Yes, probably the 8260 code evolved from the 8xx code?
Personally I like to code so logic is reset'd to a known base
even if that means we have to go through some setup steps again.
Of course, there could be a reason why it is like it is
and that's why I sent out the question...
We have a problem where hdlc sometimes seems to lookup, when the ppc
reboots it doesn't helps but after a while it is reseted by harder
means (pulling the resetline) which helps. Testing the change right now,
but it can take long time before it happens...
>===== Original Message From Jaap-Jan Boor <jjboor at aimsys.nl> =====
>On Thu, 2005-02-03 at 15:29, Per Hallsmark wrote:
>> Hi all,
>>
>> Working with a board using hdlc over SCC channel (852T) and kernel 2.4.21,
>> in the cpm reset code in arch/ppc/8xx_io/commproc.c it's like:
>>
>> void
>> m8xx_cpm_reset()
>> {
>> volatile immap_t *imp;
>> volatile cpm8xx_t *commproc;
>> pte_t *pte;
>>
>>
>> imp = (immap_t *)IMAP_ADDR;
>> commproc = (cpm8xx_t *)&imp->im_cpm;
>>
>>
>> #ifdef CONFIG_UCODE_PATCH
>> /* Perform a reset.
>> */
>> commproc->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG);
>>
>>
>> /* Wait for it.
>> */
>> while (commproc->cp_cpcr & CPM_CR_FLG);
>>
>>
>> cpm_load_patch(imp);
>> #endif
>> .......
>>
>> In our case, CONFIG_UCODE_PATCH is not defined so the commproc is never
>> reseted during reboot. Could it be that the #ifdef CONFIG_UCODE_PATCH
>> should just be around the cpm_load_patch command?
>
>It seems the author wants to reset the cpm only when microcode
>patches are needed.
>
>m8260_cpm_reset() does also not reset the cpm.
>
>I don't know why (e.g. the console is setup after this)
>
>Jaap-Jan
>
>> The CONFIG_UCODE_PATCH seems to point this to be i2c/spi patch, but
>> shouldn't a reset go to cpm in anycase?
>>
>> /Per
>>
>>
>>
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