> e is shared by all architectures. Doing something like
>
> /*
> * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
> */
> extern inline int in_8(volatile unsigned char __iomem *addr)
> {
> int ret;
>
> __asm__ __volatile__(
> "lbz%U1%X1 %0,%1;\n"
> #ifndef CONFIG_8xx
> "twi 0,%0,0;\n"
> "isync" : "=r" (ret) : "m" (*addr));
> #else
> : "=r" (ret) : "m" (*addr));
> #endif
> return ret;
> }
>
> Seems somewhat ugly?
Yes. You can work around that by macro-generating the functions with
different rules for different CPUs, or having the twi/isync be a
separate asm block that is itself in a macro or inline that gets defined
differently on 8xx
Ben.
