> Do you really need this I2O unit? You could easily create some message > ringbuffers, one in the 440EP's SDRAM for the host-to-440 messages and one in > the host-cpu SDRAM for the 440-to-host messages. This way, all messages will > be transferred using pci writes.
Actually, its not the I2O unit I want, really just the doorbell registers in the messaging unit. The MPC834x's seem to have dropped the I2O units in that the 8272-family appears to have, but they have the messaging unit registers. I plan to create something like the ring-buffers scheme you mention. And of course, you don't need an I2O unit to implement it. However, you do need to be able to interrupt the 440 from the host - which was the original issue. But, there is a work-around :) BTW, even with this scheme you really want to use DMA on the adapter board for transfers in either direction, i.e., use the peripheral for both DMA read and write. Unless of course you want to turn your 1GHz x86 host processor into a 1MHz CPU. Check out the following performance tests that I did between the current boards and an x86 host: http://www.ovro.caltech.edu/~dwh/correlator/pdf/pci_performance.pdf The boards use a PLX-9054 bridge and can DMA between themselves at 118MB/s. However, the DMA through bridges, and DMA to/from host bandwidth is less due to burst capabilites (or lack thereof) of the bridges. CPU reads/writes by the host were dismal; look at p19-26. Of course, if I had used a PowerPC host I'm sure I would have been fine! Dave
